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AI5VG Pentium VP3 Baby AT Motherboard User ’ s Manual Version 2.0.
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Contents AI5VG Pe ntium VP3 Baby AT Motherboar d User’ s Manual i Contents Chapter 1 Introduction .................................................... 1 Chapter 2 Specifications .................................................. 2 Chapter 3 Hardware Description .
Contents ii AI5VG Pe ntium VP3 Baby AT Motherboar d User’ s Manual Chapter 6 BIOS Configuration ..................................... 29 6.1 BIOS I ntroduction ...........................................................32 6.2 BIOS Setup ............
Chapter 1 I ntroduction AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 1 Chapter 1 Introduction This manual is designed to give y ou inform ation on the AI5VG Motherboard.
Chapt er 2 Specificati o ns 2 AI5VG Pentium VP3 Baby AT Motherboard U ser’ s Manual Chapter 2 Specifications Based on VIA’s VP3AT chipset, the AI5VG is a Baby AT Pentium mot herboard that s upports al l the f eatures to m ak e a Micros oft PC’97 compliant PCI/ISA sy stem .
Chapt er 2 Specificati o ns AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 3 Onboard Bus Mastering EIDE Two EIDE interf aces for u p to four devices , support PIO Mode 3/4 or Ultra DMA/33 IDE Hard Disk and ATAPI CD-R OM.
Chapter 3 Hardware Description 4 AI5VG Pentium VP3 Baby AT Motherboard U ser’s Manual Chapter 3 Hardware Description This chapter briefly describes each of the major features of the AI5VG mot herboard. The lay out of the board is show n in Figu re 1 w hich show s the locations of the key com ponents.
Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5 Figure 1: Layout of the AI5VG Motherboard.
Chapter 3 Hardware Description 6 AI5VG Pentium VP3 Baby AT Motherboard U ser’s Manual 3.1 Processor and CPU Voltage The AI5VG is designed to take a Pentium Processor with a bus speed o f 60 and 66 MHz. The internal clock of the CPU can be multiples of 1.
Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 7 (1) 72-pin SIMM (5V) EDO DRAM Bank 0 (S I MM1, SI MM2) Bank 1 (S I MM3, SI MM4) Total M em ory 4MB × 2 ----- .
Chapter 3 Hardware Description 8 AI5VG Pentium VP3 Baby AT Motherboard U ser’s Manual (2) 168-pin DI MM (3.3V) SDRAM or EDO DRAM Bank 0 (DIMM 2 ) Bank 1 (DIMM 1 ) Total M emory 8MB ----- 8MB 16 MB -.
Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 9 3. Power M anagement The power management fea ture pr ovides p ower savings by slowing do w n the CPU clock, turn ing off the m onitor screen an d stopping th e HDD spindle motor.
Chapter 3 Hardware Description 10 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 3.8 I/O Port Address Map Each peripheral devi ce in the sy stem is assi gned a set of I/O port addresses wh ich also becomes the identity of the device. There are a total of 1K port address s pace available.
Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 11 3.10 Interrupt Request Lines (IRQ) There are a total of 15 IRQ lines available on the m otherboard. P eripheral devices use interru pt request lines to notify the CPU f or the service required.
Chapter 4 Hardware Se ttings 12 AI5VG Pe ntium VP3 Baby AT Mother board Use r’s Manual Chapter 4 Hardware Settings The follow ing s ections describe th e necessary procedures and proper jumper setting s to configure th e AI5VG motherboard. 4.1 SW1(1-8): CPU Frequen cy Selector .
Chapter 4 Hardware Se ttings AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 13 Figure 2: Jumper Locations of the AI5VG.
Chapter 4 Hardware Se ttings 14 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 4.1 SW1(1-8): CPU Frequency Selector For I ntel Pentium CPU SW1 Bus C lock Mutiplier CPU FREQ. o n o ff o ff o ff o ff o ff o ff o ff 60MHz 1.5x P54C-90 o ff off o ff o ff o ff o ff o ff o ff 66MHz 1.
Chapter 4 Hardware Se ttings AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 15 For Cyrix 6x86, 6x86L CPU SW1 Bus Cloc k Mutiplier CPU FREQ . o n o ff o ff o ff o n off o ff o ff 60MHz 2x P150+ (120MHz) o ff off o ff o ff o n o ff o ff o ff 66MHz 2x P166+ (133MHz) For Cyrix 6x86MX CPU SW1 Bus Cloc k Mutiplier CPU FREQ .
Chapter 4 Hardware Se ttings 16 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual SW1 Bus Cloc k Mutiplier CPU FREQ . o ff off o ff o ff o n o n o ff o ff 66MHz 2.5x PR166 / K6-166 o ff off o ff o ff o ff o n o ff o ff 66MHz 3x K6-200 o ff off o ff o ff o ff o ff o ff o ff 66MHz 3.
Chapter 4 Hardware Se ttings AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 17 For Dual V oltage CPU: Intel P55C, Cy rix 6x86L/MX, AMD K6 SW2 V IO V CORE CPU o ff off o n o n 3.3V 3.2V K6- 233 (0.35 µ ) on on off on 3.3V 3.1V o ff on o ff o n 3.
Chapter 4 Hardware Se ttings 18 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual For Dual V oltage CPU: Intel P55C, Cy rix 6x86L/MX, AMD K6 SW2 V IO V CORE CPU o ff on o ff o ff 3.3V 2.2V K6- 233 (0.25 µ ) o n o ff o ff o ff 3.3V 2.1V K6- 233 (0.
Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 19 Chapter 5 Installation This chapter describes th e connectors an d interfaces that the A I5VG provides for creatin g a w orking s ystem . Ref er to Figure 3 for th e location of the con nectors.
Chapter 5 I nstallation 20 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Figure 3: Connector Location on the AI5VG.
Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 21 5.1 I/O Connectors The I/O con nectors conn ect th e AI5VG to the m os t com m on peripherals . To attach cables to these con nectors, carefu lly align Pin 1 of the cables to that of the connectors.
Chapter 5 I nstallation 22 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5.3 J2: ATX Pow er Supply Connector J2 is a 20- pin A TX power s u ppl y conn ect or. R ef e r to t h e f ol low ing table for the pin out assign ments. Signal Nam e Pin # Pin # Signal N ame 3.
Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 23 5.5 J7, J6: Serial Ports The onboard serial ports of the AI5VG are 10 pin -header conn ectors. J7 is COM1 and J6 is COM2 . T he following table shows the pin out of the these conn ectors.
Chapter 5 I nstallation 24 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5.7 J9, J11: EIDE Connectors J9: Prim ary IDE C onnector Signal Nam e Pin # Pin # Signal N ame Reset IDE 1 2 Ground .
Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 25 5.8 J10: Parallel Port Connector The f ollowing table de scribe s the pin out ass ignm ents of this connec tor.
Chapter 5 I nstallation 26 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5.11 J13 Wake on LAN Connector J13is a 3-pi n header f or Wake on L AN f unc tion on t he m otherboard. Pin # Signal Nam e 1 5VSB 2 Gr ound 1 2 3 3 Wa ke on L AN 5.12 J14: CPU Fan P ower Connector J14 is a 3-pin header f or the CPU fan pow er conn ector.
Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 27 Speak er: Pins 1 - 4 This connector prov ides an interf ace to a speaker for au dio tone ge neratio n.
Chapter 5 I nstallation 28 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Reset Switch: Pins 9 and 19 The reset switch allow s the us er to reset the system w ithout turning the main pow er sw itch Off an d then On. Orientation is not required wh en m aking a conn ection to this header.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 29 Chapter 6 BIOS Configuration This chapter describes the different settings av ailable in the Aw ard BIOS that comes w ith the AI5VG motherboard. The top ics covered in this chapter are as follow s: 6.
Chapter 7 LANDesk User Guide 30 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Cache Rd+CPU Wt Pipeline Read Arou nd Write Cache Timi ng Video BIOS Cacheable Syst em BIOS Cacheable Memory Hole at 15MB Addr. AGP Aperture Size OnChip USB 6.6 Power Man agem ent Setup .
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 31 IDE Primary /Secondary Mas ter/Slave PIO IDE Primary /Secondary Mas ter/Slave UDMA Onboard FDD Con troller Onboard Serial/Parallel P o rt UAR T 2 Mode Onboard Paralle l Mode 6.
Chapter 7 LANDesk User Guide 32 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.1 BIOS Introduction The Award BIOS (Basic Input/Output System ) installed in y our compu ter sy stem ’s R OM supports Intel/C yrix /AMD processors in a standard IBM-A T compatible I/O sy stem .
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 33 ROM PCI/ISA BIOS CMO S SETUP UTILITY AW ARD SOF T W A RE , INC.
Chapter 7 LANDesk User Guide 34 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.3 Standard CMOS Setup “ Standard CMOS Setup ” choice allows y o u to record some basic hardw are config urations in your com puter sy stem and set th e sys tem clock and error h andling.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 35 Time The time form at is: Hou r : 00 to 23 M in ute : 00 to 59 Second : 00 to 59 To set the tim e, high light the “ Ti m e ” fi eld and us e the <PgUp>/ <PgDn > or +/- key s to set the current tim e.
Chapter 7 LANDesk User Guide 36 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual NOTE: The specification s of your drive must match with the d rive table. The h ard disk will n ot work properly if you enter incorrect informat ion in thes e fields.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 37 6.4 BIOS Features Setup This section allow s you to configure and im prove y our system and allows you to set up som e sy stem features accordin g to you r preference.
Chapter 7 LANDesk User Guide 38 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Quick Power On Self Test This choice speeds up th e Power On Self Test (P OST) after you power up the system . If it is set to Enabled , BIOS w ill skip some item s.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 39 Typem atic Rate Setting When disabled, continually holding down a key on y our key board w ill generate only one instance. When enabled, you can set the tw o ty pematic controls listed next.
Chapter 7 LANDesk User Guide 40 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.5 Chipset Features Setup This Setup menu controls the configuration of the motherboard chipset.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 41 Cache Tim ing This field sets th e tim ing of the cach e in the s y stem .
Chapter 7 LANDesk User Guide 42 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.6 Pow er Management Setup The Power Manage m ent Setup allo ws y ou to save energy of your sy stem effectively . It w ill shut down the hard disk an d turn off video display after a period of inactivity.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 43 PM Co ntrol by APM Thi s field a llows you to use t he Advanc ed P ower M anagement d evice to enhance the Max . Power Sav ing m ode and stop th e CPU’s intern al clock.
Chapter 7 LANDesk User Guide 44 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual PM Events The VGA, LPT & COM, HDD & FDD, DMA /m aster, Modem Ring Resum e, R TC Alarm R esum e and Prim.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 45 6.7 PNP/P CI Configuration This o ption configure s the PCI bus system. All PCI bus systems on the system use INT#, thus all installed PCI cards m ust be set to this value.
Chapter 7 LANDesk User Guide 46 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual CPU to PCI Write Buffer When enabled, th is option increase th e efficien cy of the PCI bus to and speed up the execution in the processor. By default, this field is set to Enabled .
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 47 PCI IDE IRQ M ap To This field allows y ou to config ure the ty pe of IDE disk co nt roller in your system .
Chapter 7 LANDesk User Guide 48 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.8 Load BIOS Def aults This optio n allow s y ou to load the troubleshooting default v alues perman ently stored in the BIOS ROM. These default setting s are non-optim al and disable all high- perform ance featu res.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 49 6.10 Integrated Peripherals Thi s o ption se ts your hard disk co nfi gur ation, m od e and po rt.
Chapter 7 LANDesk User Guide 50 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual The sy stem supports fiv e m odes, nu mbered f rom 0 (default ) to 4, w hich primarily differ in tim ing. When A uto is selected, the BIOS w ill select the best avail able m ode.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 51 6.11 Supervisor / User Passw ord These tw o options set th e sy stem passw ord. Supervis or Passw ord sets a password that w ill be used to pr otect the system and Setup utility .
Chapter 7 LANDesk User Guide 52 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.12 IDE HDD Auto Detection This option detects th e paramet ers of an IDE hard di sk dri ve, an d automatically enters them into the Stan dard CMOS Setup screen.
Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 53 6.14 Save & Exit Setup This option allow s y ou to determ ine w heth er to accept the m odifications or not. If you ty pe “Y”, you w ill quit the setup utility and save all changes into the CMOS m emory .
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